1. Field of the Invention
The present invention relates to an integrated circuit and fabrication method. More specifically, the present invention relates to an integrated circuit including a MOSFET having a very shallow source-drain junction by virtue of removal of the source from the substrate.
2. Description of the Related Art
In Metal Oxide Semiconductor (MOS) integrated circuit applications, transistor performance is highly dependent on many factors including the concentration of dopant atoms at different depths in the substrate wafer, the concentration of dopant atoms at the wafer surface, and the ability to set and maintain a uniform and stable threshold voltage V.sub.T. Transistor performance is greatly improved when the dopant concentration is consolidated at the wafer surface. Accordingly, achieving a very shallow source drain junction greatly supports improved transistor performance.
The formation of a very shallow source drain junction is also very important form maintaining a uniform and stable threshold voltage V.sub.T. One technique for controlling threshold voltage V.sub.T is implantation of dopants to either increase or decrease the net dopant concentration at the surface of a silicon wafer. By selection of these dopants, the threshold voltage V.sub.T is selected on the basis of device performance alone. A V.sub.T -adjustment implant technique involves depositing and etching a threshold mask, then implanting boron, phosphorus or arsenic ions directly into the substrate or through a thin oxide layer to the regions under the gate oxide of a MOSFET. Boron implantation produces a positive shift in threshold voltage V.sub.T. Phosphorus or arsenic implantation causes a negative shift. The V.sub.T -adjust implant is often performed through an oxide layer with the implant energy selected to place the peak of the implant slightly below the oxide-silicon interface. Following an implant-activating anneal process, the implanted distribution is broadened.
One problem with the V.sub.T -adjust implant is that the dopant profile in a device channel underlying a gate is nonuniform due to the introduction of extra ions into the channel depletion region of the device. The additional dopant ions cause the width of the channel depletion region to be modified. The non-uniform doping profile changes long-channel subthreshold characteristics of the device as well as the punchthrough behavior of short-channel devices.
Another problem with the V.sub.T -adjust implant is that the depth at which ions are implanted is difficult to control so that shallow depths are difficult to achieve. A shallow implant is difficult to achieve using the V.sub.T -adjust implant due to limitations on energy of an implant device. For example, boron molecules are very small so that even a minimal implant energy drives the boron molecules an unsuitable depth into the substrate. BF.sub.2 molecules are larger and therefore more easily implanted to a more shallow depth although further limitations on implant depth are desired. Increasing implant depth disadvantageously creates channeling effects, creates lattice damage, and increases the voltage drop between the implant and the substrate surface.
What is needed is a technique for concentrating dopant atoms at the surface of a semiconductor wafer. What is further needed is a technique for achieving a very shallow source drain junction.